I2C communication experiment between Arduino master and slave

The I2C bus is a simple, bidirectional two-wire synchronous serial bus developed by Philips. It requires only two wires to transfer information between devices connected to the bus. The master device is used to initiate the bus transfer of data and generate a clock to open the transferred device, in which case any addressed device is considered a slave device. The relationship between master and slave, transmit and receive on the bus is not constant, but depends on the direction of data transfer at this time. If the host wants to send data to the slave, the master first addresses the slave and then actively sends the data to the slave. Finally, the master terminates the data transfer. If the master wants to receive data from the slave, the master first addresses the slave. The host then receives the data sent by the slave and finally the host terminates the receiving process. under these circumstances. The host is responsible for generating the timing clock and terminating the data transfer.

SDA (serial data line) and SCL (serial clock line) are both bidirectional I/O lines, and the interface circuit is open-drain output. It is necessary to connect the power supply VCC through a pull-up resistor. When the bus is idle. Both lines are high level, the external devices connected to the bus are CMOS devices, and the output stage is also an open drain circuit. The current consumed on the bus is small, so the number of devices that are spread on the bus is primarily determined by the capacitive load, because each device's bus interface has a certain equivalent capacitance. The capacitance in the line will affect the bus transmission speed. When the capacitance is too large, it may cause transmission errors. Therefore, its load capacity is 400pF, so the allowable length of the bus and the number of connected devices can be estimated.

The master device is used to initiate the bus transfer of data and generate a clock to open the transferred device, in which case any addressed device is considered a slave device. The relationship between master and slave, transmit and receive on the bus is not constant, but depends on the direction of data transfer at this time. If the host wants to send data to the slave, the master first addresses the slave and then actively sends the data to the slave. Finally, the master terminates the data transfer. If the master wants to receive data from the slave, the master first addresses the slave. The host then receives the data sent by the slave and finally the host terminates the receiving process. under these circumstances. The host is responsible for generating the timing clock and terminating the data transfer.

(1) In hardware, the 12C bus only needs one data line and one clock line. The bus interface is integrated inside the chip, no special interface circuit is needed, and the filter of the on-chip interface circuit can filter the bus. Glitch on the data. Therefore, the I2C bus simplifies the hardware circuit PCB layout, reduces system cost, and improves system reliability. Because the 12C chip has two lines and a small number of interrupt lines, and the line that is not connected to the system, the user's common IC can be easily standardized and modularized for easy reuse.

(2) The I2C bus is a true multi-master bus. If two or more hosts initiate data transfer at the same time, data corruption can be prevented by collision detection and arbitration. Each device connected to the bus has a unique address, any The device can act as both a master and a slave, but only one host is allowed at a time. Data transfer and address setting are set by software and are very flexible. Device additions and deletions on the bus do not affect the normal operation of other devices.

(3) The I2C bus can be detected online by external connection, which is convenient for system fault diagnosis and debugging. The fault can be immediately addressed, and the software is also conducive to standardization and modularization, which shortens the development time.

(4) The number of ICs connected to the same bus is limited only by the maximum capacitance of the bus. The serial 8-bit bidirectional data transmission bit rate can reach 100Kbit/s in standard mode and 400Kbit/s in fast mode. Up to 3.4Mbit/s.

(5) The bus has very low current consumption. Anti-high noise interference, increase the bus driver can expand the bus capacitance by 10 times, the transmission distance reaches 15m; compatible with different voltage levels, the operating temperature range is wide.