Synopsys launches DC Explorer for early RTL detection

Accelerate the design and implementation process by tolerating early detection of incomplete data

Mountain View, California, April 6, 2011—Synopsys, Inc., a NASDAQ stock market code: Synopsys, Inc., the world ’s leading supplier of semiconductor design, verification and manufacturing software and intellectual property (IP) (SNPS) recently announced that its Galaxy design implementation platform has added the latest tool DC Explorer to significantly accelerate the development of high-quality design data. To meet the extremely challenging schedule requirements of current large-scale integrated, multi-million instance, "gigabit" designs, engineers need an RTL detection solution to ensure that they can quickly and Efficiently perform what-if analysis of different design configurations—even before the design data is complete—while creating a better starting point for the implementation process. DC Explorer solves this challenge by providing up to 5 times faster runtime and a 10% timing and area correlation with DC Ultra ™ RTL. It also tolerates incomplete design data, so it can guide the development of high-quality RTL and constraints early in the design process, thus ensuring a highly integrated design process. Not long ago, at the Synopsys User Conference (SNUG ™) in San Jose, California, users have outlined the new benefits of DC Explorer in increasing productivity.
"Improving production efficiency in the early stages of design and development can significantly speed up our IC implementation process." Said Giancarlo Sada, deputy manager of digital solutions and pilot project teams at STMicroelectronics ’central CAD and design solution agency. DC Explorer was run at different development stages, and witnessed at least 4 times faster running time and 10% correlation with DC Ultra. This will enable our designers to effectively evaluate various implementations early in the process , Adjust design data, and create a highly integrated and faster design process. "
In the early RTL design and development stage of the current large and complex IC, there are multiple sources of design data, and the degree of consistency and completeness are different. Engineers lack a fast and effective way to test and refine data, fix design problems, and create a better starting point for RTL synthesis, thereby forming a highly integrated implementation process. DC Explorer provides designers with the RTL detection capabilities they need to help them effectively identify potential design problems and areas for improvement before implementation. In addition, when the input RTL, constraints, and existing library models are incomplete, DC Explorer generates a comprehensive report on what needs to be completed and repaired, thereby speeding up the design creation process. Finally, DC Explorer is compatible with Design Compiler® RTL synthesizer statements, which makes it very easy to use and can be easily deployed into existing customer processes.
"Synopsys is continuously committed to helping our customers increase their production capacity and shorten the design cycle for their gigabit system-on-chip devices." Said Antun Domic, Synopsys senior vice president and general manager of the Implementation Solutions Division: "DC Explorer is designed for IC The engineers provided another important productivity improvement tool, enabling them to perform RTL detection very early in the design process, thereby improving the quality of design data and significantly accelerating the design process. "

Supply
DC Explorer is only available for limited customers

About Synopsys
Synopsys, Inc., Nasdaq: SNPS is a global leader in electronic design automation (EDA) industry, providing software, intellectual property (IP) and semiconductor design, verification and manufacturing for the global electronics market service. Synopsys' complete and integrated product portfolio combines its implementation, verification, IP, manufacturing, and field programmable gate array (FPGA) solutions to help designers and manufacturers solve the various key challenges facing them today. Such as power consumption, yield management, system-to-silicon verification and implementation time. These technology-leading solutions can help Synopsys customers build a competitive advantage by bringing the best products to market quickly while reducing costs and schedule risks. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices in North America, Europe, Japan, Asia, and India.