The difference between SoC packaging technology and SIP packaging technology

With the advent of the Internet of Things era, global terminal electronic products are gradually moving toward multi-functional integration and low-power design, which has led to the increasing attention of SIP technology that can integrate multiple bare crystals in a single package. In addition to the existing expansion and testing giants to actively expand the SIP manufacturing capacity, wafer foundry and IC substrate manufacturers are also competing to invest in this technology to meet market demand.

Earlier, Apple released the latest Apple Watch watch, which uses a SIP package chip to add color to the new watch in terms of size and performance. The development of the chip has shifted from pursuing power consumption degradation and performance improvement (Moore's Law) to more pragmatically satisfying market demand (beyond Moore's Law).

According to the definition of International Semiconductor Route Organization (ITRS): SIP is a single entity that realizes certain functions by preferentially assembling a plurality of active electronic components with different functions and optional passive components, and other devices such as MEMS or optical devices. Standard packages form a system or subsystem.

SIP definition

Architecturally speaking, SIP integrates multiple functional chips, including functional chips such as processors and memories, into one package to achieve a substantially complete function.

SOC definition

Integrate ICs with different functions into one chip. With this method, not only can the volume be reduced, but also the distance between different ICs can be reduced, and the calculation speed of the chip can be improved. The SOC is called a system-on-chip. It is also called a system-on-a-chip. It means that it is a product. It is an integrated circuit with a dedicated target, which contains the complete system and has the entire contents of the embedded software. At the same time, it is a technology to realize the whole process from determining the system function to the software/hardware division and completing the design.

Comparison between SOC and SIP

From the development of individual components to the integration of multiple components, the integration of integrated circuit devices has entered a new phase of package integration with the improvement of product performance and the demand for thin and light consumption. Under the guidance of this development direction, two new mainstreams related to the electronics industry have been formed: system on-chip SOC (System on Chip) and systemized package SIP (System in a Package).

SOC is very similar to SIP, both of which integrate a system that contains logical components, memory components, and even passive components into a single unit.

The SOC is designed from the perspective of integrating the components required by the system onto a single chip.

SIP is a side-by-side or superimposed package of different chips from the standpoint of packaging. It combines multiple active electronic components with optional functions and optional passive components, as well as other devices such as MEMS or optical components. A single standard package that implements certain functions.

The elements that make up SIP technology are package carriers and assembly processes. The former includes PCB, LTCC, Silicon Submount (which can also be an IC itself), which includes traditional packaging processes (Wire bond and Flip Chip) and SMT devices. Passive devices are an important part of SIP, such as traditional capacitors, resistors, inductors, etc. Some of them can be integrated with the carrier. Others such as high precision, high Q, high value inductors, capacitors, etc. are assembled by SMT. On the carrier.

SIP package

In terms of integration, in general, the SOC only integrates logic systems such as APs, while SiP integrates AP+mobile DDR, and to some extent SIP=SOC+DDR, with higher integration in the future. Emmc is also likely to be integrated into SIP.

From the perspective of packaging development, SOC has been established as the key and development direction of future electronic product design due to the requirements of electronic products in terms of volume, processing speed or electrical characteristics. However, with the increasing cost of SOC production in recent years, technical obstacles have frequently been encountered, which has caused bottlenecks in the development of SoC, and the development of SIP has been increasingly valued by the industry.

SIP package form

The SIP packaging technology adopts a plurality of bare chips or modules for arrangement and assembly. If the arrangement is distinguished, the structure can be roughly divided into a planar 2D package and a 3D package. Compared with the 2D package, the stacked 3D packaging technology can increase the number of wafers or modules used, thereby increasing the number of layers that can be placed in the vertical direction, further enhancing the functional integration capability of the SIP technology. The internal bonding technique can be either simple wire bonding or Flip Chip or a mixture of the two.

In addition, in addition to the 2D and 3D package structure, it is also possible to adopt a multi-functional substrate integration component--the different components are built in the multi-function substrate to achieve the purpose of function integration. Different chip arrangements, combined with different internal bonding technologies, enable a variety of combinations of SIP packages and can be customized or flexibly produced according to customer or product requirements.

Several SIP packaging solutions

SIP technical difficulties

The mainstream packaging form of SIP is BGA, but this is not to say that SIP technology is mastered with traditional advanced packaging technology.

For circuit design, the three-dimensional chip package will have multiple die stacks. Such a complicated package design will bring many problems: for example, multi-chip integrated in one package, how the chips are stacked; for example, complex traces need more The layer substrate is difficult to be routed by conventional tools; there are also spacing between the traces, equal length design, differential pair design and the like.

In addition, as the complexity of the module increases and the operating frequency (clock frequency or carrier frequency) increases, the difficulty of system design will increase. In addition to the necessary design experience, the numerical simulation of system performance is also essential. Design link.

SOC and SIP technology trends

In terms of integration, in general, the SOC only integrates logic systems such as APs, while SIP integrates AP+mobileDDR, to some extent SIP=SOC+DDR, with higher integration in the future, emmc It is also likely to be integrated into SIP. From the perspective of packaging development, SOC has been established as the key and development direction of future electronic product design due to the requirements of electronic products in terms of volume, processing speed or electrical characteristics. However, with the increasing cost of SOC production in recent years, technical obstacles have been encountered frequently, which has caused bottlenecks in the development of SOC, and the development of SIP has been increasingly valued by the industry.